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We can provide any of the peripherals that we designed for the Rabbit 2000, 3000, 4000, 5000 or 6000. They have not been fully "productized", but are all silicon-proven.

The bus interface is close to AMBA and includes dedicated DMA interface signals where appropriate.

Please contact us if you are interested in any of them.

Input Capture 2 channel, 16-bit for counting/timing
Spread Spectrum Clock Optimal spreading profile, purely digital design
10Base-T network port Full/half-duplex, with autonegotiation; no external PHY required
Multi-function I/O One channel from the Rabbit RIO
Pulse-Width Modulator 4 channel, 10-bit
Quadrature Decoder 2 channel, 8/10 bit, for motion control
Real-Time Clock 48-bit ripple counter, very low power
Slave Port 8-bit slave port, from Rabbit CPU
UART/Clocked Serial Port four-byte tx and rx buffers
Multi-function Counter/Timer 16-bit Timer C, from Rabbit CPU
UART/HDLC Serial Port four-byte tx and rx buffers, DPLL
FPGA Dual HDLC Serial Port Full-featured FPGA implementation, with 512-byte buffers using on-chip memories
ISO7816 UART Full-featured ISO7816/EVM4.3 UART, with protocol state machine
SHA-256 Module Compliant with FIPS PUB 180-4 Secure Hash Standard. SHA-224 and SHA-256.
SHA-512 Module Compliant with FIPS PUB 180-4 Secure Hash Standard. SHA-512/224, SHA-512/256, SHA-384 and SHA-512.
SHA-3 Module Compliant with FIPS PUB 202 Permutation-Based Hash Standard. SHA3-224, SHA3-256, SHA3-384, SHA3-512, SHAKE128 and SHAKE256.
Z80-SIO from Zilog schematics, with permission

12/02/2016
Copyright 2016, Systemyde International Corporation